Description
Designs and builds FPGA or CPLD projects for Xilinx devices. Hardware developers can synthesize, debug, and program device designs; bitstreams can alter connected hardware and proprietary licensing applies.
FICHA · AUR
vitis
FPGA/CPLD design suite for Xilinx devices
- fpga-design-suite
- GRAPHICAL
- Dev
- HARDWARE
- Launchable
official+codex · reviewed · Jun 5, 2026 description in
en How to run
vitis
Commands: vitis
Permissions
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