Description
Formal hardware verification flows can be driven from a front-end that coordinates Yosys and optional SMT solvers. It installs the sby command from current SymbiYosys source for FPGA and HDL projects.
FICHA · AUR
symbiyosys-git
A front-end driver program for Yosys-based formal hardware verification flows
- verification-tool
- CLI
- Dev
- HARDWARE
- Launchable
- Runs in terminal
official+codex · reviewed · Jun 4, 2026 description in
en How to run
sby
Commands: sby
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