FICHA · AUR

python-litejesd204b

Small footprint and configurable JESD204B core

  • JESD204B converter-link logic FPGA core
  • LIBRARY
  • HARDWARE
  • Dependency only
official+codex · reviewed · Jun 3, 2026 description in en

Description

JESD204B converter-link logic can be integrated into FPGA and SoC designs through the LiteX ecosystem. Hardware developers use this core for high-speed data converter links, simulation, synthesis, and board bring-up. Generated gateware can affect real devices, so timing, pinout, and test coverage need review.

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