FICHA · AUR

python-liteiclink

Small footprint and configurable Inter-Chip communication cores

  • Inter-chip communication logic FPGA core
  • LIBRARY
  • HARDWARE
  • Dependency only
official+codex · reviewed · Jun 3, 2026 description in en

Description

Inter-chip communication logic can be integrated into FPGA and SoC designs through the LiteX ecosystem. Hardware developers use this core for chip-to-chip links and board-level interconnects, simulation, synthesis, and board bring-up. Generated gateware can affect real devices, so timing, pinout, and test coverage need review.

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