FICHA · AUR

python-liteeth

Small footprint and configurable Ethernet core

  • Ethernet networking logic FPGA core
  • LIBRARY
  • HARDWARE
  • Dependency only
official+codex · reviewed · Jun 3, 2026 description in en

Description

Ethernet networking logic can be integrated into FPGA and SoC designs through the LiteX ecosystem. Hardware developers use this core for network interfaces and packet paths, simulation, synthesis, and board bring-up. Generated gateware can affect real devices, so timing, pinout, and test coverage need review.

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