FICHA · AUR
python-cocotb
Coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
- HDL cosimulation library
- LIBRARY
- HARDWARE
- TESTING
- Dependency only
· official+codex · reviewed · Jun 3, 2026 description in en
VHDL and Verilog testbenches can be written with Python coroutines through cocotb. This library is for hardware verification engineers testing HDL designs. Simulations can drive generated hardware behavior, so tests, seeds, and toolchain versions need control.
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