Description
VHDL hardware designs can be simulated with the GCC backend.
This is hardware description language tooling. It is useful for FPGA, ASIC, and digital logic workflows before synthesis or hardware testing.
FICHA · AUR
VHDL simulator - GCC back-end
en VHDL hardware designs can be simulated with the GCC backend.
This is hardware description language tooling. It is useful for FPGA, ASIC, and digital logic workflows before synthesis or hardware testing.
ghdl
Commands: ghdl
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